A variable gain BiCMOS LNA (low noise amplifier) allows the linearity of the LNA to be sacrificed for higher sensitivity, and the sensitivity of the LNA to be sacrificed for higher linearity. For example, in the case where a higher gain for a low input signal is required, the sensitivity of the LNA is increased at the expense of the linearity by switching to BJT amplifier selectively. Conversely, in the case where a lower gain for a high input signal is required, linearity of the LNA is increased at the expense of sensitivity by switching to apply MOSFET amplifier selectively.
Attempts have also been made to achieve variable gain BiCMOS LNAs. U.S. Pat. No. 7,054,605, U.S. Pat. No. 6,977,552, U.S. Pat. No. 6,930,546, U.S. Pat. No. 6,586,993, US20050068099 disclose attempts to provide variable gain through the use of a bypassing switch. In these disclosures, either BJT (Bipolar Junction Transistor) or MOS (Metal-Oxide-Semiconductor) transistors are used to build low noise and high gain amplifiers. MOS transistors are used to build the bypass switching circuit. However, such designs suffer from various shortcomings. These circuits are complex in design, particularly when the input and output impedances have to be kept unchanged when switching the gain mode. Further, the variability is limited as only 2 gain modes are provided, e.g. a high gain mode and a low gain mode. The reverse isolation is also insufficient to minimize LO (local oscillation) leakage into the antenna at low-gain mode or bypass mode. Additionally, in the low-gain (bypass) mode, frequency selectivity is not available and the gain level is not easily controlled in circuit design.
U.S. Pat. No. 6,046,640, U.S. Pat. No. 6,472,936, U.S. Pat. No. 6,639,468, U.S. Pat. No. 6,819,179 and U.S. Pat. No. 7,019,593 disclose the provision of the variable gain through an output loading switch in conjunction with BJT or MOS LNAs. These solutions may provide consistent input match and good inverse isolation. However, there exist difficulties in keeping the output impedance and frequency response of these circuits unchanged during the switching of gain modes.
U.S. Pat. No. 7,403,071 discloses a LNA design which provides variable gain through an Input Attenuation Switch. While the circuit design is relatively simple and overcomes all shortcomings from above, it suffers from reduced sensitivity at high gain mode because of the 2-port input attenuation network.
The use of a capacitor network as an attenuator has also been disclosed. For example, A digital controlled Variable-Gain Low-Noise Amplifier with Strong Immunity to Interferers using 0.5 um SiGe BiCMOS has been disclosed in IEEE Journal of Solid-State Circuits, Vol. 42, Issue 11, November 2007, by Sharp Corporation, Japan. The circuit, however, does not show consistent frequency selectivity and good S11 at all gain modes.
A Dual Mode Low Noise Amplifier for WCDMA applications using 0.35 um SiGe BiCMOS was disclosed in the International SoC Design Conference 2004 by the Department of EEE, POSTECH, Pohang Korea which also illustrate the use of a MOS amplifier as an attenuator. The circuit however does not show frequency selectivity and cannot provide enough LO leakage isolation to the RF antenna in the bypass mode. Further, it is a single-ended circuit and is easily affected by various interference signals.
SiRF Technology, Inc, US disclosed a Novel Simultaneous Input and Output Matching Method for GPS CMOS Switched Low Noise Amplifier using 0.18 um SiGe BiCMOS—50th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2007, 5-8 Aug. 2007, Page(s): 423-426, while NEC Corporation, Japan discloses a 23/3 dB Dual Gain LNA for 5-GHz Band Wireless Applications (InGaP/GaAs HBT) in 24th Annual Technical Digest on Gallium Arsenide Integrated Circuit (GaAs IC) Symposium, 2002, Page(s): 197-200. Both circuits illustrate the use of MOS amplifiers as an attenuator but are however, complicated and may therefore be susceptible to processing related failures. Additionally, the input and output terminals are not isolated from each other and therefore, simultaneous input and output impedance adjustments are required. Further, attenuation produced by the circuit is limited.
U.S. Pat. No. 7,120,411 discloses a MOS LNA design which provides variable gain by allowing adjustments to the DC current passing LC tank, settles input/output impedance matching, signal frequency response and reverse isolation at all gain steps simultaneously. However, the design is limited to a pure CMOS LNA design and is not suitable for use with a BiCMOS LNA as it is difficult to isolate the Bipolar amplifier circuit block from the CMOS amplifier circuit block, and to keep return loss S11 minimum during switching between the Bipolar amplifier and the CMOS amplifier.
Therefore, there exists a need to provide a system and method for a variable gain BiCMOS Amplifier to address all problems in input/output impedance matching, frequency selectivity, and sufficient reverse isolation at all gain steps as mentioned above and solving all the problems simultaneously.